Job Title :
SoC Design Verification Engineer
Location : Bangalore
Experience : 4+ Years
Notice Period : Immediate to 15 days
We are looking for a highly skilled
Design Verification Engineer
with strong experience in
SoC-level verification
and
C / SystemVerilog-based test development
ARM-based SoC environments
Gate Level Simulations (GLS)
, and
Power-Aware Verification using UPF-based RTL simulation
Senior Design Verification Engineer • Delhi, India