Design for Test (DFT) Engineering Director

DFT - Director

Leading Semiconductor Services Organization

Location : Bangalore

Job Description : Job Description

We are looking for DFT - Director responsible for DFT design-implementation-validation, MBIST / Scan / ATPG implementation, pattern generation, validation leading to SOC tapeout. Timing constraints development and test timing closure support, Support Post-silicon pattern bringup through release-to-production.

The role requires thorough understanding of ASIC design life-cycle and expert understanding of DFT design concepts, test strategies across digital / mixed-signal / analog designs, knowledge of interdependencies with front / backend domains, silicon bringup requirements and experience and skill / desire to lead team of engineers

• Thorough understanding of internal / External DFT architecture and technology.
• Good understanding of ASIC life cycle, execution flows and planning multidisciplinary activities is required.
• Strong knowledge and experience in

Cadence Modus

Mentor Tessent

Synopsys Testmax

Scan Insertion, Memory BIST and JTAG at IC –level for mixed signal designs

Qualifications

Degree in Computer Science or Electrical / Electronic Engineering. Master's degree is preferred.