Senior Design Verification Leads / Architects

Hi All,

Greetings' from Eximietas Design....!

We are Hiring Senior SOC Design Verification Leads / Architects.

Experience : 10+ Years.

Location : Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.

Anyone with a Valid H1B or Already in US.

Job Description :

We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a strong background in PCIE (Peripheral Component Interconnect Express) to join our team. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip (SoC) designs. You will work on complex verification challenges, collaborate with cross-functional teams, and contribute to the delivery of high-quality, innovative semiconductor solutions.

Key Responsibilities :

Develop and implement verification plans for complex SoC designs, with a focus on PCIE subsystems .

Create and maintain advanced testbenches using SystemVerilog and UVM (Universal Verification Methodology) .

Write and execute test cases to verify functional and performance requirements, particularly for PCIE protocols .

Debug and resolve functional and performance issues in collaboration with design and architecture teams.

Develop and enhance verification environments, including reusable components and checkers for PCIE and related interfaces .

Perform coverage-driven verification and ensure coverage closure.

Collaborate with cross-functional teams to define verification strategies and methodologies.

Mentor junior engineers and contribute to the continuous improvement of verification processes.

Qualifications :

10+ years of hands-on experience in SoC design verification, with a strong focus on PCIE protocols .

Expertise in SystemVerilog and UVM (Universal Verification Methodology) .

In-depth knowledge of PCIE specifications (e.g., PCIE Gen3 / Gen4 / Gen5) and verification methodologies.

Proficiency in developing and debugging complex testbenches and test cases for PCIE subsystems .

Experience with coverage-driven verification and achieving coverage closure.

Familiarity with AMBA protocols (AXI, AHB, APB) and other industry-standard interfaces.

Knowledge of low-power verification techniques and power-aware simulation .

Experience with formal verification tools and methodologies is a plus.

Strong problem-solving skills and attention to detail.

Excellent communication and teamwork skills.

Preferred Skills :

Knowledge of scripting languages such as Python, Perl, or Tcl.

Familiarity with machine learning accelerators or AI / ML-based SoC designs .

Experience with advanced process nodes (e.g., 7nm, 5nm).

What We Offer :

Opportunity to work on cutting-edge SoC designs and innovative technologies.

Collaborative and inclusive work environment.

Competitive compensation and benefits package.

Professional growth and development opportunities.