▷ Urgent Search! RTL Design Engineer

RTL Design Engineer

Experience : 2-3 years

Location : Hyderabad

Knowledge in RTL Coding in Verilog or VHDL

Strong understanding of Logic design, Digital design, System design aspects, FPGA flow, Design Constraints etc.

Knowledge in Xilinx FPGA architecture and design flows like IPI, XDC etc.

Good Knowledge in Tcl, Python scripting

Interested,please drop your updated resume to janagaradha.n@acldigital.com