Principal Engineer – Chip Design Front End

We are looking for a highly skilled Digital Front-End Lead to drive and contribute to chip-level architecture, RTL design, and verification, while managing and mentoring a high-performing team. The ideal candidate will possess deep technical expertise and leadership capabilities, with a strong background in SoC design, RTL coding, verification planning, and project management .

This role requires a proactive approach to continuous improvement and collaboration across disciplines. We are specifically seeking a Verification Leader with design exposure , capable of ensuring robust verification strategies while contributing to architectural and design decisions.

• Target products are not FPGA-based.
• Experience with MCU products featuring ARM cores is preferred.

Key Skills - Priority Level (1(Low) - 5(High))

Chip Level Verification – 5

Management -5

RTL Design & Quality Verification - 4

Architecture Design – 3

Constraint Creation and Synthesis (SDC / STA) - 3

Chip Level Assembly – 3

Power System Design- 3

Testing, On-Board Evaluation, and Mass Production Support- 3

Power Estimate- 2