We are seeking a highly experienced SoC Architecture & RTL Engineer to design, implement, and optimize complex digital systems for next-generation computing platforms. This role offers the opportunity to work on cutting-edge SoC architectures involving high-speed interfaces and industry-standard protocols.
Key Responsibilities
- Design and develop SoC architecture and RTL for complex digital systems.
- Work on CPU, GPU, and DSP pipelines, cache coherence protocols, and network-on-chip (NoC) designs.
- Integrate and validate PCIe, CXL, DDR, Ethernet, and other high-speed IPs.
- Ensure compliance with industry-standard protocols such as AXI, TileLink, PCIe, UCIe, and CXL.
- Perform simulation, synthesis, and optimization to meet performance and power targets.
- Collaborate with cross-functional teams for silicon delivery.
- Debug and resolve design and integration issues.
- Continuously explore and adopt new tools, methodologies, and technologies.
Required Skills and Qualifications
Bachelor s or Master s degree in Electrical / Electronics Engineering, Computer Engineering, or a related field.10+ years of experience in SoC architecture and RTL engineering.Strong expertise in digital design concepts, computer architecture, and hardware description languages (Chisel, Verilog, SystemVerilog or VHDL).Hands-on experience with PCIe, CXL, DDR, Ethernet IPs.Experience with AXI, TileLink, PCIe, UCIe, and CXL protocols.Proficiency with digital design tools, simulation, and synthesis flows.Excellent problem-solving, communication, and teamwork skills.Ability to work independently in a fast-paced environment.Preferred Skills
Experience in CPU / GPU / DSP core pipeline design and cache coherence protocols.Exposure to network-on-chip (NoC) architectures.Familiarity with power and performance optimization techniques.