Senior STA / Synthesis Engineer

Synthesis is a crucial stage in ASIC design specially at sub-5nm technologies. Innovations at the synthesis stage can benefit next stages of BackEnd execution and overall chip quality significantly.

At MediaTek, our core synthesis teams focusing continuously on the pursuit of best PPA Power, Performance, Area plus the co-relation of Synthesis with physical design, while delivering innovative solutions to the top of the line competitive smartphone product lines at below 5nm technologies.

Key Responsibilities :

• Check library and design consistency
• Validating synthesis SDC quality
• Utilize tool variables and methodologies to tap the best area / power achievable for the process node.
• Checking the synthesis DEF quality
• Analyze critical timing violation groups and congestion – solve them by finetune floorplan or placement constraints.
• Compare area / power with previous projects and check current project results.
• DFT Insertion and debugging basic DFT issues.
• Discuss directly with Design teams & Physical design teams to get the best synthesis results.

Requirements :

If you are passionate about technology, love to innovate and take up challenges of leading technology nodes. Mediatek is just the right place for you.

Come join us and be a part of this skilled team to deliver the best that the process node can offer.