Senior Engineer FPGA

Position Details

Role: Senior Engineer – FPGA (HDD)

Location: Chennai, India

Experience: 5–7 Years

Job Summary:-

We are currently hiring for a Senior Engineer (FPGA) opportunity with a leading organization in the Electronics and Defense domain.

Key Responsibilities

• Perform requirements generation and FPGA RTL design using VHDL/Verilog.
• Develop FPGA-based solutions adhering to the DO-254 development lifecycle.
• Work on synthesis, Static Timing Analysis (STA), timing closure, and design constraints.
• Design and implement high-speed interfaces such as PCIe, DDR, JESD, and Ethernet.
• Continuously improve FPGA simulation, testing, and validation environments.
• Balance architectural trade-offs involving area, power, and performance requirements.
• Perform system-level debugging and troubleshooting using logic analyzers and Tcl scripting.
• Contribute to Radar Digital Signal Processing (DSP) implementations and optimizations.

Required Technical Skills

• Strong proficiency in VHDL and/or Verilog.
• Hands-on experience with FPGA development tools such as Vivado and/or Quartus.
• Good understanding of the DO-254 FPGA development lifecycle.
• Expertise in Static Timing Analysis (STA), floorplanning, and timing closure.
• Experience with Xilinx and/or Altera (Intel) FPGA architectures.
• Strong knowledge of high-speed protocols including PCIe, Ethernet, DDR, JESD, and SERDES.
• Experience in FPGA verification, simulation, and debugging methodologies.
• Strong analytical and problem-solving skills.

Preferred Skills

• Exposure to Radar Digital Signal Processing.
• Experience with Tcl scripting for FPGA automation and debugging.
• Experience working on Defense, Aerospace, Semiconductor, or Electronics-based projects.
• Knowledge of high-speed digital design principles and signal integrity concepts.

Skills Required
Tcl Scripting, Verilog, Timing Closure, Vhdl