Senior ASIC Verification Engineer

Own RTL and subsystem verification for ARM-based SoCs powering AI and security infrastructure. Drive functional, performance, and system-level verification using industry-standard methodologies while collaborating with design, firmware, FPGA, DFT, and backend teams throughout the ASIC lifecycle.

Key Responsibilities at this Role :

- Develop comprehensive test plans and verification strategies for ARM-based SoC.

- Lead RTL and micro-architecture verification.

- Execute functional and system use-case verification.

- Collaborate with firmware and backend teams throughout development.

- Support post-silicon validation and chip bring-up activities.

- Deliver robust verification environments ensuring coverage closure.

Must-Haves for this Role :

- 8-10 years of hands-on UVM verification and UVM environment development experience.

- Strong expertise in RTL verification, gate-level simulation, and coverage-driven verification.

- Hands-on experience with AMBA protocols : AXI, AHB, and APB.

- Experience verifying high-speed interface protocols such as PCIe, USB, Ethernet, DDR3/DDR4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, and UART.

- Experience in post-silicon bring-up/debug and functional test vector development.

Extra Information :

- Formal verification and Portable Stimulus experience are advantageous.

- Exposure to AI infrastructure or data center SoCs is preferred.

- Opportunity to work with cross-functional teams including firmware and DFT.

- Strong communication and documentation skills.

- Ability to drive complex verification programs independently.

- Role is based out of Hyderabad.

(ref:hirist.tech)