RTL Design Engineer

RTL DesignLocation : BangaloreExperience- 4+ yearsMust haveHands-on experience and expert-level knowledge in RTL design and coding in Verilog and VHDLHands-on experience and expert-level knowledge in SoC integration of ARM core-based designsExperience in working with AMBA Bus- AXI, AHB, APB.Experience in IP development : Standard Ips like PCIe Gen5 or Gen6, USB4.x, Ethernet, UCIe, HBMHands-on experience and expert-level knowledge in ASIC SynthesisHands-on Experience with Lint and CDC.Experience in equivalency checkingExperience with FPGA based designs or FPGA prototypingIn-depth understanding of Verilog / VHDL and ARM SoC architectureHands-on experience and expert-level knowledge in Static Timing AnalysisEducational Qualification : BE / ME or BTech / MTechPreferredExperience in Ethernet, PCIeExperience in the networking domainExperience in PERL, TCL. PythonTools – Cadence / Synopsys toolsets