Job Description
Key Responsibilities:
Requirement
Qualifications
HBM/DDR Subsystem Verification- Lead • Bengaluru, KARNATAKA, India
Work on Analog/Mixed-Signal Functional Verification for Analog/Mixed-Signal IPs, such as SERDES, Sensors and beyond.Digital and AMS Verification methodologies and processes, and contribute to the e... Show more
We are seeking a highly skilled and experienced Analog Design Leader to lead and drive the development of cutting-edge analog and mixed-signal circuits for Non-Volatile Memory (NVM) IPs (OTPs, MTP,... Show more
BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.Design Verification experience with SV/UVM.Strong background on functional verification ... Show more
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At Cisco's Common Hardware Group (CHG), our Signal & Power Integrity (SI/PI) team is where physics meets innovation.We design and analyze the high-speed interconnects and power distribution network... Show more
Analog Circuit Design Engineer:.Circuit design experience in analog/mixed signal CMOS circuits in High speed Memory interfaces (DDR3/4/5, LPDDR3/4x/5, GDDR5/6) or SerDes Interfaces (PCIe, MIPI, HDM... Show more
Design Verification Engineer - Senior / Lead / Sr.Location: Bangalore / Hyderabad.Universal Verification Methodology).Strong understanding of digital design principles, verification methodologies, ... Show more
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Title: DDR and SOC verification engineer.Responsible for DDR PHY verification at SoC level Execute Gate level simulations.Responsible for code coverage closure.Hands on experience in SV/UVM based t... Show more
Develop and implement comprehensive verification plans for HBM4/4e IP and Subsystem.Create and maintain testbenches, test cases, and verification environments using System verilog and UVM methodolo... Show more
We are seeking a highly skilled Design Verification Engineer with more than 5 years of experience, specializing in HBM and DDR DRAM IP and subsystem verification, to join our innovative team.The id... Show more
Architect testbenches for PCIe Gen5/Gen6/Gen7 XTOR solutions on advanced FPGA /Asic platforms.Develop new C++/UVM based test architectures for high performance datapaths and protocol engines.Map co... Show more
Work on Analog/Mixed-Signal Functional Verification for Analog/Mixed-Signal IPs, such as SERDES, Sensors and beyond.The candidate will work with digital design, analog design, analog behavioral mod... Show more
Must have hands-on experience coding in System Verilog/UVM.Experience developing testbenches for block level or IP level verification.Experience working on subsystem or SoC level would be helpful.C... Show more
Job Description – Senior Synthesis Engineer (VLSI).Worked on 7nm/5nm/Future sub-micron Technologies.Multi corner & Multi-mode, Low Power, Performance and Area Goal.Hands on experience in Logic equi... Show more
BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.Design Verification experience with SV/UVM.Strong background on functional verification ... Show more
You should be a verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification i... Show more
PLM domain within the aerospace industry.Airbus experience is highly preferred.PLM environments integrated with CAD.Strong understanding of aerospace standards, documentation, and compliance requir... Show more
L&T Technologies is looking to hire for SOC DV Lead role.Develop functional tests based on a verification test plan.Experience in Co simulation (RTL + Spice).Good understanding on Analog blocks.Exp... Show more
L&T Technology Services Limited (LTTS) is a global leader in Engineering and R&D (ER&D) services.With 816 patents filed for 57 of the Global Top 100 ER&D spenders, LTTS lives and breathes engineeri... Show more
