[3 Days Left] Synthesis Engineer

Job Description

Synthesis Engineer : (4-10 Years)

Key Responsibilities

Synthesis Environment setup

Validating synthesis SDC quality

Utilize Synthesis tool variables and methodologies to extract the best area / power achievable for the process node.

Checking the synthesis DEF quality

Analyze critical timing violation groups and congestion – solve them by finetune floorplan or placement constraints.

Compare area / power with previous projects and check current project results.

DFT Insertion and debugging basic DFT issues.

Discuss directly with Design teams & Physical design teams to get the best synthesis results.

Requirement

Requirements

Bachelors or Masters Degree with a strong VLSI Background

Minimum 3 years of experience in the area of Synthesis