AMS Verification Senior Engineer (4 - 7 yrs)
We are seeking highly skilled and motivated AMS Verification Senior Engineers to join our growing team. In this role, you will be responsible for developing and executing analog / mixed-signal (AMS) verification strategies to ensure the performance and reliability of complex semiconductor designs.
Key Responsibilities :
- Develop AMS verification environments, testbenches, and test sequences for mixed-signal IPs or SoCs.
- Perform mixed-signal simulations and analyze results to ensure compliance with design specifications.
- Define and track functional and coverage metrics; write coverage models and monitor progress.
- Identify, debug, and resolve mismatches between expected and actual simulation results.
- Collaborate with analog, digital, and modeling teams to resolve verification issues and improve test coverage.
Requirements :
4- 7 years of hands-on experience in AMS verification.Strong understanding of analog / mixed-signal modeling and verification flows.Experience in using tools such as Cadence AMS Designer, Synopsys VCS AMS, or similar.Proficiency in scripting languages (e.g., Python, Perl, Shell) for automation and debugging.Solid knowledge of mixed-signal debug methodologies and waveform analysis.Familiarity with Verilog-AMS, SystemVerilog, SPICE, and behavioral modeling.Excellent problem-solving skills and ability to work in a cross-functional team environment(ref : hirist.tech)