2-5 years of experience in mixed-signal design verification and at least 2 years of experience managing a team of verification engineers.
Strong fundamentals in mixed-signal designs, including a thorough understanding of analog building blocks, digital design processes, and top-level integration.
Writing and maintaining Analog Mixed Signal models, using real number modelling and VerilogAMS.
Experienced in setting up and maintaining mixed signal testbench from scratch with the capability to debug and optimize mixed-signal simulation performance, understanding the necessary trade-offs.
Strong simulation debug capability, able to analyze simulation waveforms and pinpoint issues in schematics simulation or models
Experience with Cadence Mixed-Signal Design Environment tools, including Virtuoso, ADE Assembler, Xcelium , VIVA & Simvision
Expertise in Cadence Spectre simulation test bench development, Regression Flow & debug
Expertise in mixed-signal waveform review, debugging, and coverage analysis.
Strong understanding of Unix environment and shell scripting, alongside working knowledge of Python & automation skills
Experience with functionally safe design verification and fault injection is highly desirable.
Non-Technical Skills
Excellent verbal and written communication skills in English.
In-depth understanding of organizational objectives, with keen insights into business trends and market conditions.
Awareness and sensitivity to cross-cultural dynamics.
Results-oriented and able to meet aggressive timelines
Mentor & develop technical talents
Provide frequent reports on progress status and roadblocks, ensuring transparent communication with stakeholders.
Effectively manage project tasks and issues using JIRA, showcasing strong organizational and tracking abilities.