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Senior Engineer II - Design Engineer

Senior Engineer II - Design Engineer

ConfidentialHyderabad / Secunderabad, Telangana, India
5 days ago
Job description

Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our we affectionately refer to it as the and it's won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.

Visit our page to see what exciting opportunities and company await!

Job Description :

As a Design Engineer in the FPGA Business Unit, you will lead the design and development of advanced FPGA-based solutions and SoC components. This role demands strong technical leadership, deep expertise in RTL design, and hands-on experience across the full chip lifecycle-from microarchitecture definition to post-silicon validation. You will collaborate with global teams to deliver high-performance, power-efficient designs for next-generation FPGA products

Key Responsibilities :

  • Architecture & Design

Define and develop microarchitecture specifications for FPGA subsystems and SoC components.

  • Perform RTL design in Verilog / SystemVerilog for datapath and control logic.
  • Drive design for performance, power, and area optimization.
  • Integration & Verification

    • Integrate complex IP blocks and subsystems into FPGA fabric and SoC-level designs.

  • Collaborate with verification teams to develop test plans and debug pre-silicon and post-silicon issues.
  • Prototyping & Emulation

    • Develop RTL for FPGA-based prototyping and emulation for early validation of SoC designs.

  • Support hardware bring-up and debug using oscilloscopes, logic analyzers, and FPGA platforms.
  • Post-Silicon Debug

    • Participate in silicon validation, characterization, and debug activities.

  • Develop strategies for hardware / software co-validation and system-level performance tuning.
  • Cross-Functional Collaboration

    • Work closely with architecture, software, and product teams to align design goals with system requirements.

  • Mentor junior engineers and promote best practices in design methodology.

    • Requirements / Qualifications :

    Required Qualifications

  • Education : BSEE / MSEE (preferred) in Electrical / Electronics / VLSI Engineering.
  • Experience : 8 to 12 years in ASIC / FPGA design, with at least 5 years in technical leadership roles.
  • Core Skills :

    • Experience in digital design with strong RTL coding skills in Verilog / SystemVerilog.

  • Excellent understanding of SoC architectures
  • Experience in integration of complex IPs in SoC .
  • Excellent understanding of low power design techniques and methodologies.
  • Experience in running all the static RTL checks - Lint, CDC.
  • Good understanding of synthesis, STA, timing closure, and ECOs
  • Familiarity with FPGA design tools (Xilinx Vivado, Intel Quartus, Lattice Diamond).
  • Solid understanding of SoC integration, AXI / AMBA bus protocols, and low-power design techniques.
  • Proficiency in configuration and integration of components like DDR, Ethernet, USB, PCIe..

    • Desirable Skills

  • Protocols & Domains :

    • PCIe Gen4 / Gen5, DDR4 / DDR5, LPDDR4X, MIPI DSI / CSI, Ethernet MAC, USB.

  • Security and cryptography IP integration.
  • ARM / RISC-V architecture.
  • Advanced Capabilities :

    • Exposure to post-silicon debug , emulation , and hardware prototyping .

  • Experience with FPGA-based acceleration platforms and simulation / emulation flows.
  • Software & Scripting :

    • Python, TCL / TK, and C / C++ for automation and validation.

  • Tools :

    • Familiarity with Cadence / Mentor simulation suites and revision control systems (Git, Perforce).

    Preferred Attributes

  • Strong analytical and problem-solving skills.
  • Ability to lead cross-site teams and manage complex design programs.
  • Excellent communication and collaboration skills for global team interaction.

    • Why Join Us

  • Work on cutting-edge FPGA and SoC technologies shaping next-generation computing.
  • Opportunity to lead methodology innovation with AI / ML-driven verification flows.
  • Collaborate with global teams and impact first-silicon success for flagship products.

    • Skills Required

    Verilog, systemverilog, Usb, Cadence, Tcl, Ethernet, Synthesis, Axi, Git, Ecos, C, Rtl Design, Perforce, Python, Pcie, Ddr

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    Senior Design Engineer • Hyderabad / Secunderabad, Telangana, India