EMULATION ENGINEER

We are seeking a medium-sized Contingent Workforce (CW) skilled SOC Verification Engineers to support the Diamond Rapids (DMR) System-on-Chip (SOC) verification project. This critical initiative focuses on ensuring the functional correctness and performance of next-generation server and client SOCs. The team will play a pivotal role in simulation and emulation-based verification, directly contributing to the successful deployment of advanced semiconductor solutions.

Detailed Responsibilities

Collaborate with architects, designers, and verification leads to define verification strategies for the DMR SOC.

Develop, implement, and maintain System Verilog (SV) and UVM-based testbenches for comprehensive SOC functional verification.

Execute simulation-based verification (70%) and emulation-based verification (30%) to validate complex SOC designs.

Generate and debug test cases, analyze coverage metrics, and identify design issues or bottlenecks.

Document verification plans, procedures, and results for internal and client-facing reports.

Participate in regular technical reviews, status meetings, and cross-functional collaboration to ensure project milestones are met.

Contribute to the continuous improvement of verification methodologies, flows, and best practices.

Skill Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related discipline.

5+ years of hands-on experience in SOC verification, with a strong focus on simulation and emulation.

Proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM).

Demonstrated expertise in SOC-level verification, preferably with experience in server or client SOC projects.

Solid understanding of verification planning, coverage analysis, and debugging complex hardware issues.

Experience with industry-standard simulation and emulation tools.

Strong analytical, problem-solving, and communication skills.

Other Requirements (Optional)

Familiarity with scripting languages (such as Python, Perl, or Shell) for automation.

Experience working in global, cross-functional teams.

Exposure to formal verification or post-silicon validation is a plus.

Relevant industry certifications (e.g., Accellera UVM, IEEE) are advantageous.