Senior SoC Verification Engineer

Job Summary

This is a critical role for an experienced Verification Lead who will drive the design verification process for complex SoC integration. The ideal candidate will have a strong background in digital hardware design and Verilog / System Verilog HDL, as well as expertise in one or more verification methodologies – UVM / OVM, formal, power aware verification, emulation.

Key Responsibilities :

• Develop and execute test plans, defining test methodologies, creating SystemVerilog / Verilog testbenches and tests, and debugging of test failures and issues.
• Collaborate with project management and leads on planning tasks, setting schedules, and quality checkpoints.
• Work closely with engineers from design and performance analysis to ensure seamless project delivery.

Requirements :

What We Offer :