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Design Verification Engineer

Design Verification Engineer

ACL Digitalhyderabad, telangana, in
30+ days ago
Job description

Experience : 2-3 Years

Location : Hyderabad

Education : B.E. / B.Tech. in ECE / EEE or M.E. / M.Tech. in VLSI / Electronics

Roles and Responsibilities

  • Strong expertise in UVM-based verification.
  • Hands-on IP-level verification exposure and a solid understanding of serial protocols are a must.

Share resumes at raksha.k@acldigital.com

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Design Verification Engineer • hyderabad, telangana, in

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