Principal CPU Design Verification Engineer
We are seeking an experienced verification engineer to lead verification efforts of complex CPU and related subsystems based on the open-source RISC-V architecture. The right candidate will have deep technical expertise combined with exceptional leadership skills.
Responsibilities :
- Lead end-to-end verification from complex CPU sub-units up to CPU clusters, partnering with architecture and design teams
- Develop verification infrastructure components including test-benches, scoreboards, and stimulus generators
- Develop and execute comprehensive verification plans for units and features
- Implement functional coverage models
- Debug designs in simulation, prototyping platforms, and silicon
- Continuously drive methodology improvements to improve efficiency
- Lead senior and junior engineers as a team to accomplish successful projects
Minimum Qualifications :
Bachelors or Masters degree in electrical, computer engineering or related fieldBS+10 years or MS+12 years of industry experience successfully delivering CPU implementationsSkills & Qualifications Required :
System Verilog verification development experienceTestbench construction using UVM or analogous methodologiesScoreboards and stimulus generators for complex unitsStrong background in one or more common CPU ISAs. x86, ARM, MIPS, RISC-V, etc.Strong background in processor coherency and MP programmingProject ownership throughout the project lifecycleDemonstrated team leadership experience with outstanding communication skillsHighly motivated self-starter with strong execution mindset and collaborative approachPost-silicon debug experience strongly preferred(ref : hirist.tech)