Senior Mixed Signal Verification Engineer

Who are we and what do we do?

TI offers one of the world's largest comprehensive portfolio of Multi phase voltage regulators addressing requirement of various market segments like Intel Server, AMD servers, personal electronics and automotive. Power Stage development team has full product development responsibility from definition till releasing product to market. We also take pride in challenging norms on innovation & executing those innovative ideas into products with aggressive, customer-driven timelines.

What will you be doing in this role? (Responsibilities)

Responsible for developing a coverage driven verification plan by working closely with System, APPS and design team to ensure first pass silicon success

Model development using RNM / EENET

Develop test scenarios, automation and create stimulus to verify the design under test

Work with regression tools and develop scripts to submit cases for regression analysis

Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods and flows

What do we expect from you? (Mini Qualifications)

Knowledge and Skills

Strong in Circuit Debug

Automation using Verilog AMS

Ability to debug circuit issues independently and report issues

Model development using EENET, RNM is an added advantage

Knowledge of System Verilog is an added advantage

Proficiency in Scripting languages and utilities including Python, Perl, etc.

Other

Good team player, attitude and thirst for continuous learning

Strong communication and interpersonal skills

Ability to function independently

Preferred Skills / Experience

2-5 Years’ experience in Mixed Signal verification

Skills : Virtuoso, Verilog, Verilog AMS, Cadence tools like xrun / ncsim / Vmanager