Staff Verification Engineer

Academic Qualification / Skills required :

• B.E / M.E. in Electronic & Communication / Computer Science Engineering
• High performance individual to work on Synopsys next generation emulation solutions for PCIe, USB, Ethernet protocols
• Good knowledge of one of peripheral protocols primarily PCIe, USB, Ethernet
• Knowledge of System Level verification and validation, and digital design concepts
• Knowledge of languages such as Verilog, System Verilog, C / C++, and scripting languages- Perl / TCL / Shell, Python
• Knowledge of emulation and prototyping domains an added advantage
• 6-8 Years of experience in protocols / design verification and validation, scripting, and automation
• Good communication skills and team player
• At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Skills Required

Verilog, System Verilog