Senior ASIC Design Engineer - NOC IP

NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used in their industry-leading Graphics Processors. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

In this position, you will be expected to make architectural trade-offs based on features, performance requirements and system limitations, come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis / timing clean design. You will work with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and backend teams to accomplish your tasks.

What You'll Be Doing

• Own micro-architecture and RTL development of design modules.
• Micro-architect features to meet performance, power and area requirements.
• Work with HW architects to define critical features.
• Collaborate with verification teams to verify the correctness of implemented features.
• Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.
• Interact with FPGA and S / W teams to prototype the design and ensure that S / W is tested.
• Work on post-silicon verification and debug.

What We Need To See

Ways To Stand Out From The Crowd

NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

JR1998309

Skills Required

Vcs, Gdb, Timing Analysis, Rtl Design, Eco, Perl, Verilog, debussy , Python