Senior Verification Engineer - Digital Hardware Design

Job Description

You will be a key member of our team, responsible for leading the design verification process. This role involves collaborating with engineers from design and performance analysis to ensure that our SoC designs meet the required specifications.

Your main responsibilities will include developing SystemVerilog / Verilog testbenches and tests, debugging issues, and working on planning tasks and schedules with project management and leads.

We are looking for an experienced verification engineer with a proven understanding of digital hardware design and Verilog / System Verilog HDL. Your experience in one or more verification methodologies – UVM / OVM, formal, power aware verification, emulation – is also essential.

• Digital Hardware Design : You should have a solid understanding of digital hardware design principles, including knowledge of SoC integration verification, scenario verification, performance verification, CHI / PCIe / CXL, DDRx / LPDDRx integration verification in SoC RTL.
• Verification Methodologies : We are seeking someone with experience in one or more verification methodologies – UVM / OVM, formal, power aware verification, emulation.
• Test Development : Your expertise in developing SystemVerilog / Verilog testbenches and tests is crucial for this role.

Required Skills and Experience

Nice To Have