Power Integrity Analysis Lead
Texas InstrumentsBengaluru, Republic Of India, IN1 day ago
Job descriptionThe PI Signoff / IR Drop Analysis Lead is responsible for Signoff level IR drop, Power / Signal EM analysis of a Subsystem and Full SoC. Candidate will be responsible for running EM and Static / Dynamic IR analysis for various modes / power scenarios, root cause failures, provide fixing solutions. Should follow / define best practices and strategy as per technology node. Contributes to problem solving related to overall PI analysis. Responsibilities include EM and IR drop analysis (vector and vectorless) for both block and full chip designs for various power modes and scenarios. Provide feedback / improvement / fixing suggestions to various stake holders like owners for Power, package, pattern, physical design, timing, etc Analyze weakness area(s) in the design and provide fixing solutions. Automation for reporting, debug, fixing suggestions / ECOs. Setting up and Maintaining the environment for the overall PI analysis Provide training to junior folks in the team to enhance their productivity and to extract quality work
Minimum requirements
- Bachelor's degree in Electrical Engineering, ECE, or related field
- 6+ years of relevant experience
- Good understanding of signal integrity and power integrity principles
- Signal integrity extraction / 3D models generation experience Cadence, HFSS and Siemens Advanced Solvers
- Expertise in circuit simulation with different tools such as Hspice, ADS, Cadence TopXp
- System level SI simulation using simulation tools
- Tools Used : Cadence PowerSI / Agilent ADS / Siemens Advanced Solver / Allegro SIP / Ansys SI wave, HFSS
- Expertise in circuit simulation with different tools such as Hspice and ADS.
Role expectation :
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Power • Bengaluru, Republic Of India, IN
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