Soc Design Lead – Hbm & Lpddr Memory Controllers

SoC Design Lead – HBM & LPDDR Memory Controllers

Bangalore / Hyderabad

Job Title : SoC Design Lead – HBM & LPDDR Memory Controllers

We are a well-funded early-stage startup building the next generation of high-performance SoC design technologies.

We’re seeking a seasoned SoC Design Lead with expertise in memory controller microarchitecture and RTL development to drive the design of one of HBM or LPDDR controller IP. This is a unique opportunity to shape our technology portfolio in advanced memory systems, while working hands-on to deliver industry-leading solutions for AI, HPC, and next-gen SoCs.

Responsibilities

• Lead the design and development of high-performance memory controllers for HBM (HBM2 / 2E / 3) or LPDDR (LPDDR4x / 5 / 5x).
• Own the microarchitecture definition, from early exploration and research to detailed architectural specifications.
• Develop and optimize RTL code to meet aggressive performance, power, and area targets.
• Collaborate with verification teams on test plans, coverage, debug, and formal assertions to ensure robust validation.
• Work with PHY teams to define and validate DFI-compliant interfaces, training flows, calibration, and timing closure.
• Partner with system architects and firmware / software teams to define performance requirements, configuration flows, and integration strategies.
• Drive quality-of-service (QoS), scheduling, and re-ordering logic to maximize memory bandwidth and efficiency.
• Provide technical leadership and mentorship, establishing best practices in microarchitecture, RTL design, and methodology.

Qualifications & Preferred Skills

Contact : Uday

Mulya Technologies

muday_bhaskar@yahoo.com

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