CPU performance analysis of Arm v8 and v9 Cortex A CPU IP.
System performance analysis for Arm total compute solution.
Frequency, Cache, Latency and Bandwidth sweep analysis.
Workloads bring up and characterization.
Workload reduction (Sim pointing) flow enablement
PRINCIPAL DUTIES AND RESPONSIBILITIES :
Experience in designing and developing low-level software / firmware using C, C++, and ARM assembly for high-performance, resource-constrained embedded systems.
Expert, hands-on knowledge of on ARM v8 / v9-A series CPU architectures. Deep knowledge of the RISC-V ISA is a significant advantage.
Proven expertise in ARM system specifications, including hands-on implementation or extensive customization of PSCI (Power State Coordination Interface), SCMI (System Control & Management Interface), and ARM Trusted Firmware-A (TF-A),.
Deep understanding of System on Chip (SoC) architecture, including hardware coherency (CPU-to-CPU and I / O coherency), cache management, and the intricacies of Memory Management Units (MMU) and Translation Lookaside Buffers (TLB).
Extensive experience with system power management architectures : Low Power Modes (LPM) and CPU idle / active state management.
Mastery of the C programming language for writing robust, efficient, and portable firmware and system-level code.
In-depth knowledge of boot architecture and secure boot sequences, including hands-on experience with UEFI, ARM Trusted Firmware-A (TF-A), ACPI specification and bootloaders.
Proven expertise in system software fundamentals : OS kernel internals, task scheduling, atomics, synchronization primitives, and memory management.
Expertise in embedded systems SW design, including real-time operating systems (RTOS). Proven experience with the Zephyr RTOS for prototyping, driver development, and power management is highly desirable.
Familiarity with the internals of OS kernels (Linux or Windows) and their interaction with CPU and SoC features. Experience in device driver development is an added advantage.