Hands-on experience and expert-level knowledge in RTL design and coding in Verilog and VHDL
Hands-on experience and expert-level knowledge in SoC integration of ARM core-based designs
Experience in working with AMBA Bus- AXI, AHB, APB.
Experience in IP development : Standard Ips like PCIe Gen5 or Gen6, USB4.X, Ethernet, UCIe, HBM
Hands-on experience and expert-level knowledge in ASIC Synthesis
Hands-on Experience with Lint and CDC.
Experience in equivalency checking
Experience with FPGA based designs or FPGA prototyping
In-depth understanding of Verilog / VHDL and ARM SoC architecture
Hands-on experience and expert-level knowledge in Static Timing Analysis
Educational Qualification : BE / ME or BTech / MTech
Preferred
Experience in Ethernet, PCIe
Experience in the networking domain
Experience in PERL, TCL. Python
Tools – Cadence / Synopsys toolsets
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Hardware Engineer • Republic Of India, IN
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