Responsible for ownership and verification of high-speed serial interface features and protocols, with experience in AMBA, DSP, DDR, and Ethernet IP cores
Develop robust, feature-optimized test benches for designated devices under test (DUT).
Continuously explore and implement innovative verification methodologies to enhance the quality and efficiency of test benches and drive process improvements
Provide technical guidance to junior verification engineers and interns
Serve as an individual contributor in verification tasks, including test bench architecture, test case coding, debugging, and verification coverage improvement
Participate in technical reviews of verification designs to ensure a robust, bug-free IP sign-off and consistently deliver high-quality results
Analyze coverage metrics and enhance them by defining additional targeted test cases.
Operate effectively within project and team-oriented environments, collaborating closely with cross-functional teams
Demonstrate willingness to assume ownership of the complete verification cycle
Capable of delivering complex, large-scale projects that extend beyond immediate job responsibilities
Perform duties with minimal supervision
Exhibit strong analytical and debugging skills alongside independent problem-solving capabilities
Requirements / Qualifications :
BSEE / MSEE under Electronics or Electronics / Telecommunications Engineering department
9+ to 12 years relevant digital IP / SoC verification experience
15 to 20Yrs exp in Verification Manager
Required Skills
Skilled in constructing verification environments, developing test benches, creating test cases and coverage points
Experienced in designing SV / UVM based test benches
Knowledgeable in System Verilog
Proficient with various verification tools
Familiar with scripting tools for verification, including TCL and Perl
Typically responsible for providing guidance, coaching, and training to engineering peers
Able to interpret standard specifications, functional requirements, and feature updates; capable of creating micro-architectures and detailed designs for components within the Test Environment related to IP cores in protocols such as AMBA (AMBA2, AXI), SD, eMMC, DDR, PCIe, Ethernet, MIPI, DSPs (FFT, FIR), and Avionics (1553)
we strive to provide opportunities that create significant development experiences and a sense of ownership directly impacting customer success. We encourage diversity and recognize the value of bringing in multi-viewpoints in technology. We create an environment for
employee recognition, technical training, and focus on employee wellness and community engagement.
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