15+ years of experience in System Level verification using C and UVM verificationProficient in testplanning and testcase development in C / Assembly / SystemVerilogExpertise in verifying design at RTL level and gate-level simulationSoC exp should have.Good understanding of coverage analysis, performance verification and use-case verificationUsage of the third party Verification IPsExperience in functional test development for post-silicon bring-up / debugFluency with scripting languages (e.g., Make, Perl, Python, Shell); andHas worked on the project complete cycle from the Specification to Tapeout and involved in Post Silicon Validation.Exposure to the FPGA Validation and debugMust have experience on SoC verification and high-speed protocols exp. Like, PCIe, USB, GPIO, Slow Peripherals requirements - Soft Skills
Communication