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SOC Verification Engineer, Silicon

SOC Verification Engineer, Silicon

ConfidentialBengaluru / Bangalore, India
6 hours ago
Job description

Minimum qualifications :

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 4 years of experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog at Subsystem and full-chip level.
  • Experience with debugging of full chip flows and test sequences.
  • Experience with reusable testbench design and development at Sub System and full chip level.
  • Experience in C / C++ or System Verilog based tests, test sequence development.

Preferred qualifications :

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience in low-power design verification.
  • Experience with digital system based on AMBA Bus protocols like ACE / AXI / AHB / APB or similar complexity bus protocols.
  • About The Job

    Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

    As a Silicon Design Verification Engineer on the Google Silicon team, you will be ensuring the quality and scalability of our custom System-on-Chips (SoC) offerings. This role requires close collaboration with hardware architects and design engineers to execute comprehensive functional verification of the core SoC infrastructure and complex system-level scenarios, including the detailed verification of generic SoC features such as clocking, reset, power management, and performance. You will drive the development and maintenance of a robust, state-of-the-art testbench environment, utilizing expertise in C / C++ and SystemVerilog / Universal Verification Methodology (UVM), with a specific focus on abstracting, building, and verifying generalized system topologies to address next-generation scalability issues.

    The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.

    Responsibilities

  • Verify designs using verification techniques and methodologies.
  • Work cross-functionally to debug failures and verify the functional correctness of the design.
  • Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
  • Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

    Skills Required

    systemverilog

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    Verification Engineer • Bengaluru / Bangalore, India

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