Meta is seeking an Application-Specific Integrated Circuit (ASIC) Design Engineering Manager to lead our team in developing processing blocks for a System-on-Chip (SOC). As a key leader, you will drive Register-Transfer Level (RTL) design planning and execution, foster innovative methodologies, and manage IP design and SOC integration. You will collaborate closely with cross-functional teams, including Architecture, Software / Firmware, Verification, Modeling, Emulation, and Post-Silicon Validation, to shape silicon architecture and micro-architecture development.
ASIC Engineering Manager Responsibilities :
- Lead an ASIC design team, managing Register-Transfer Level (RTL) design planning and execution, innovative methodology development, u-Arch, IP design, and SOC integration
- Collaborate with Architecture, Software / Firmware, Design, Modelling, Emulation, and Post-Silicon Validation teams to drive silicon architecture and interface development
- Partner with cross-functional teams (executives, managers, individual contributors) to achieve corporate objectives
- Contribute to and drive the overall silicon strategy aligned with the corporation's Long Range Plan objectives
- Collaborate with IP development teams to identify, select, and license soft and hard IP
- Build, lead, and support a team of ASIC engineers through strategic hiring, training, and guidance to ensure on-time and on-budget product delivery
- Analyze and audit statements of works (SOWs) from vendors, supporting documentation, and requirements sets to meet internal customer needs
- Support engineering teams in defining, debugging, implementing, and delivering total solutions around purpose-built ASICs
- Establish and maintain Key Performance Indicators (KPI) for areas of responsibility
- Partner with technical program management and supply chain team members to manage external development partners, suppliers, and vendors
Minimum Qualifications :
B.S. degree in Computer Engineering, Electrical Engineering, or a relevant technical field (or equivalent practical experience)8+ years of ASIC / SoC RTL design experience3+ years of People Management experienceIn-depth understanding of RTL design tools, including Synopsys DC compiler, Cadence LEC, and SpyglassProven track record of first-pass success in ASIC DevelopmentExperience managing multiple projects, prioritizing tasks, and collaborating with stakeholdersPrior experience with interpreting functional specs and create comprehensive u-ArchitecturesPreferred Qualifications :
End to end SOC execution experienceHands-on RTL coding experiencePost silicon support experienceUnderstanding of high speed protocols like Ethernet / PCIe / USBAbout Meta :
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Skills Required
spyglass, ASIC Design