Sr Layout Design Engineer

You Are :

You are an experienced and highly motivated professional with a strong technical background in standard cells layout design. You thrive in collaborative environments, working closely with cross-functional teams to deliver high-quality layout designs. Your expertise in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler, allows you to create and optimize complex layouts efficiently. You are well-versed in physical verification processes and design rule checks, ensuring the integrity and manufacturability of your designs. Your problem-solving skills and systematic approach enable you to tackle challenges effectively. You are a lifelong learner, staying updated with the latest industry trends and advancements in standard cells layout design.

What You ll Be Doing :

• Collaborate with cross-functional teams to develop and implement layout designs for digital circuits.
• Create and optimize layout designs using industry-standard EDA tools.
• Perform physical verification and design rule checks to ensure design integrity and manufacturability.
• Work closely with circuit designers to understand design specifications and constraints.
• Contribute to the development and enhancement of layout design methodologies and best practices.
• Stay updated with the latest industry trends and advancements in standard cells layout design.
• The Impact You Will Have :
• Ensure the delivery of high-quality layout designs for Logic Libraries IP development, integral to SOC subsystems.
• Drive innovation in layout design methodologies and best practices.
• Collaborate effectively with circuit designers to meet design specifications and constraints.
• Contribute to the overall success of the Logic Libraries IP group.

What You ll Need :

Skills Required

Cadence Virtuoso, Physical Verification