Apply in 3 Minutes! Senior / Lead Asic Verification Engineer (VIP Development - PCIE / MIPI / Ethernet)

We are looking for experienced Senior / Lead ASIC Verification Engineers for our Bangalore VIP team. Does this sound like a good role for you?

• Experience : 5yrs to 10 years (multiple roles)
• Location : Bangalore & Noida
• Associated with Verification especially using industry-standard protocols & methodology
• Languages : Hands-on experience with System Verilog & Verilog. Should have a good understanding of Object-Oriented Programming.
• Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM / OVM / UVM methodologies.
• Should have a work exposure on any of the industry standard protocols AMBA / UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocols
• Job responsibilities :
• Able to contribute to the development of the VIP
• Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective.
• Liaison with Architects / methodology experts to achieve resolutions on issues or driving output from an architecture / methodology perspective

Please share your updated CV to taufiq@synopsys.com or refer who would like to explore this opportunity.