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Digital Design Engineering

Digital Design Engineering

ConfidentialBengaluru / Bangalore, India
10 days ago
Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ : ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on and .

The Position : Analog Devices, Inc. is looking for a Power Methodology Design Engineer, Principal to join our Digital Business Unit. The candidate will be self-motivated, willing to learn exciting new technologies and develop new products, but also be able to work effectively within a talented group of individuals across multiple development locations. The candidate will be involved in the definition and developments of various low power methodology and circuits in advanced technology nodes.

Responsibilities :

  • Write high-level architecture specifications.
  • Design and implement low power techniques including RTL and UPF design
  • Lead PPA analysis and power modeling to determine design tradeoffs
  • Perform synthesis and timing what-if analysis
  • Develop and automate low power design flows in collaboration with cross-functional teams

Minimum Qualifications & Experience :

  • M.Sc. Degree in Electrical Engineering, Computer Science, or Computer Engineering, with 10+ years of experience
  • Experience in low power design and methodology in advanced technology nodes
  • Excellent technical and analytical background with problem-solving skills
  • Great team worker with multi-discipline, multi-cultural and multi-site environments
  • Strong scripting and flow automation skills (Shell, TCL and Python)
  • Strong RTL development experience in HDL programming languages (Verilog / SystemVerilog)
  • Experience in Digital Design Flow including synthesis and static timing analysis
  • In-depth understanding of low power design techniques such as power gating, clock gating, state retention, near-threshold computing, etc.
  • Excellent written and verbal communication

    • Preferred Qualifications & Experience :

  • PhD in Electrical and Computer Engineering
  • Experience in Cadence Suite (Virtuoso ADE Spectre)
  • Experience in System-C and Platform Architect
  • Experience in PDN or IR analysis
  • Experience in SPICE simulation

    • Job Req Type : Experienced

    Required Travel : Yes, 10% of the time

    Shift Type : 1st Shift / Days

    Skills Required

    systemverilog, Timing Analysis, Spectre, virtuoso, Verilog, Tcl, Platform Architect, Static Timing Analysis, Synthesis, Python

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