Power and Clock Systems Engineer

Principal / Staff Circuit Engineer – PMIC / Clock IC (Bangalore, India)

Join our world-class semiconductor design team shaping the next generation of SoC power and clock systems . We’re driving innovation in Power Management ICs (PMIC) and PLL / Clock architectures for cutting-edge applications. If you’re passionate about analog design and solving complex technical challenges, we want to hear from you.

Role Summary

We’re looking for an experienced and motivated Principal or Staff Circuit Engineer specializing in Power Management and PLL circuit design . In this role, you’ll lead the design and development of advanced analog IPs, including regulators, DC-DC converters, and PLLs, ensuring best-in-class performance and robustness.

Key Responsibilities

• Lead design and development of power management circuits , including voltage regulators , DC-DC converters (PWM / PFM) , and LDOs (ultra-low noise, capless, fast transient architectures).
• Design and implement high-performance PLL circuits for frequency synthesis and clock generation.
• Conduct circuit simulations and performance optimization using tools such as Cadence Spectre .
• Collaborate closely with layout and system teams to ensure robust and efficient designs.
• Perform lab testing, validation, and characterization of PMIC and PLL circuits.
• Mentor and guide junior engineers , fostering technical excellence and innovation.
• Participate in product definition, specification, and system-level design reviews .

Qualifications

Why Join Us

📍 Location : Bangalore, Karnataka, India

💼 Job Type : Full-time | Senior-Level (Principal / Staff)

Ready to make an impact?

Apply now or connect with us directly on LinkedIn to explore this exciting opportunity.