This job offer is not available in your country.

Sr Engineer / Lead Sr. Engineer (SoC Power and Performance Validation)

ConfidentialBengaluru / Bangalore

30+ days ago

Job description

Summary :

Highly skilled and detail-oriented Hardware Engineer with 5+ years of experience in SoC power and performance validation , focusing on bare-metal environments for cutting-edge ARM- and Hexagon-based Qualcomm chipsets . Demonstrates strong expertise in system-level power modes , performance KPI analysis, and embedded programming. Proven ability to collaborate across multi-disciplinary teams to debug complex issues, drive architectural investigations, and optimize power and performance in real silicon platforms.

Core Competencies :

SoC Architecture & Validation :
In-depth knowledge of ARM / X86 processor systems , cache / memory hierarchies, and power domains.
Expertise in low power modes , power rail collapse validation , and subsystem interaction.
Performance Characterization :
Skilled in identifying Key Performance Indicators (KPIs) across CPU, GPU, multimedia, and memory systems.
Experienced with bandwidth, latency, and workload profiling to uncover architectural bottlenecks.
Debug & Analysis :
Hands-on experience in deep dive performance analysis , debug trace evaluation, and subsystem-level investigation.
Familiarity with pre-silicon validation tools (e.g., emulation, virtual platforms).
Programming & Tools :
Proficient in C, C++ , and Python for developing test cases, automation, and data analysis.
Able to build low-level firmware for ARM / Hexagon processors to validate hardware features.
Collaboration & Communication :
Comfortable interfacing with IP design, DV, validation , and software teams to align test coverage and resolution strategies.
Strong technical writing and verbal communication skills for documenting findings and driving cross-functional decisions.

Key Accomplishments :

Designed and implemented power / performance test plans for next-gen SoC silicon, resulting in early identification of architectural inefficiencies and power optimization opportunities.

Developed and executed custom bare-metal workloads to validate low power SoC states , achieving coverage for shared rail collapse and dynamic power domains.

Contributed to debug of performance regressions , working across pre-silicon and post-silicon teams to identify root causes and validate fixes.

Technical Skills :

Languages : C, C++, Python

Concepts : SoC Architecture, Power Domains, Cache Coherency, Performance Metrics

Tools : JTAG, Emulation, Virtual Platforms, Trace Debuggers

Platforms : ARM, Hexagon Q6, Embedded Linux (knowledge), Bare-metal Systems

Other : Data Analysis, Test Automation, KPI Modeling

Skills Required

Python, C, C++, SOC design, hardware engineering

Create a job alert for this search

Sr Engineer • Bengaluru / Bangalore