About Analog Devices
Analog Devices, Inc. (NASDAQ : ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on and .
Job Responsibilities :
- Verification of complex designs such as accelerators / datapath IP, processor core subsystems, complex interfaces / protocols such as DDR / Ethernet / USB etc using leading edge methodologies like UVM & Formal DV
- Architect the testbench and develop the verification environment in UVM andFormal based verification approaches
- Define testplan, tests and verification methodology for block / sub-system level verification. Work with design team in generating test-plans and closure of code and functional coverage.Integrate the block testbench at sub-system level UVM environment and verify integration. Interact with analog co-sim and firmware team in enabling toplevel chip verification aspects
- Package verification environment for Digital IP for seamless integration into verification flow at different stages of execution
- Evaluate 3rd party IPs on key qualitative aspects such as design quality, robustness of Design Verification (DV) practice, ease of DV environment integration and make recommendations. Establish evaluation flows for home-grown & 3rd party IPs for consistent benchmarking of DV evaluation
- Build expertise on complex interfaces, peripherals & protocols such as DDR, Ethernet, eMMC / SD, MIPI, Display Port, HDMI, PCIe, high speed D2D
- Support post-silicon verification activities of the products working with design, product evaluation and applications engineering team
Position Requirements :
Minimum B.E. / B.Tech degree in Electrical / Electronics / Computer science6 - 10 years' experience in design verification with UVM and constrained random, coverage-based verification approachesStrong understanding of DV concepts with an eye on developing scalable DV environment architecture that realizes first pass DV successExperience with translating Design Verification (DV) requirements such as test plans into a robust DV environment and generate coverage metrics for demonstrating DV convergenceAdaptability to learn end application / systemsand map into smart verification test plansExcellentdebugging and analytical skillsGood interpersonal, teamwork and communication skills to logically & effectively drive discussions with teams spread geographicallyKnowledge of Assertion based formal verificationUnderstanding of standard on-chip interfaces such as APB / AHB / AXI / Stream protocols is a strong plusKnowledge of Processor / SoC architecture and / or DSP fundamentals is a strong plusExperience with ASIC / SoC product DV & productization is very desirableJob Req Type : Experienced
Required Travel : Yes, 10% of the time
Shift Type : 1st Shift / Days
Skills Required
APB, Uvm, Design Verification, Usb, Sd, Test Plans, AHB, Ethernet, Pcie, Ddr, HDMI