Memory Layout EngineerMirafra Technologies • India
Memory Layout Engineer
Mirafra Technologies • India
6 days ago
Job description
JD :
Should be able to work independently on SRAM memory IP layout development.
Skill Requirements : -
Proficient with calibre LVS / DRC verification. Leafcell development of SAM blocks.
Experience : - 5-14 years
Qualifications : B.Tech / B.E / M.Tech / M.E
Thanks,
Riki Dutta Saha
Email :
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Engineer • India
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