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Physical Design Engineer
Physical Design EngineerSi14 Semiconductor Private Limited • Greater Bengaluru Area, India
Physical Design Engineer

Physical Design Engineer

Si14 Semiconductor Private Limited • Greater Bengaluru Area, India
4 days ago
Job description

Interested candidates please apply : https : / / forms.gle / qU3cLSRC2BnoRVXN8

Key Responsibilities :

Mixed-Signal Design :

  • Design, simulate, and verify analog / mixed-signal IP blocks (ADC, DAC, PLL, LDO, Bandgap, etc.)
  • Work on schematic design, layout review, and post-layout simulations.
  • Support integration of analog IPs into SoC environments.
  • Collaborate with digital and layout teams to ensure performance, power, and area goals are met.
  • Perform validation and debugging of mixed-signal circuits during silicon bring-up.

Physical Design :

  • Own and execute digital block and top-level physical design from synthesis to GDSII.
  • Perform floorplanning, placement, CTS, routing, and timing closure.
  • Run sign-off checks : DRC, LVS, IR Drop, EM, and STA (Static Timing Analysis).
  • Collaborate closely with the analog / mixed-signal and verification teams for seamless integration.
  • Optimize designs for PPA (Power, Performance, Area) and ensure on-time project delivery.
  • Required Skills and Experience :

  • Education : B.E. / B.Tech / M.E. / M.Tech in Electronics, Electrical, or VLSI Design.
  • Experience : Minimum 3 years in mixed-signal or physical design roles in client projects.
  • Proficiency in Cadence Virtuoso , Spectre , Synopsys ICC2 , Innovus , or PrimeTime .
  • Strong understanding of CMOS fundamentals , timing analysis , and floorplanning methodologies .
  • Hands-on experience in analog-digital interface verification and mixed-signal integration .
  • Exposure to tape-out and post-silicon validation will be an added advantage.
  • Excellent communication and collaboration skills for cross-functional project engagement.
  • Preferred Qualifications :

  • Experience working on client-site projects or multi-site collaboration .
  • Familiarity with advanced technology nodes (e.g., 7nm, 5nm).
  • Knowledge of power intent (UPF / CPF) and clock-domain crossing (CDC) checks.
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    Design Engineer • Greater Bengaluru Area, India

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