Radiant Semiconductors - GLS Engineer - Verification Methodologies

Description :

Location : Bengaluru / Chennai

Experience : 5 to 10 Years

Job Description :

We are looking for skilled GLS Engineers with hands-on experience in Gate-Level Simulations, high-speed interfaces, and power-aware verification methodologies.

Key Responsibilities :

• Work with PCIe, high-speed peripherals, AXI bus, BSPs, and related subsystems
• Knowledge of Power-Aware Simulations and UPF methodology for DV environments
• Strong exposure to GLS framework, test mode GLS simulations, and timing-annotated simulations
• Proficiency in SystemVerilog, UVM, and testbench development
• Build / debug testbenches, monitors, scoreboards, and functional coverage
• Debug regressions with a focus on performance and bandwidth improvements
• Expertise in Bus Protocols, IP & Subsystems Verification, Audio Domain / Memory Subsystems, and Power-aware DV methodologies

Skills :

(ref : hirist.tech)