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Senior IP Verification Engineer
Senior IP Verification EngineerConfidential • Hyderabad / Secunderabad, Telangana
Senior IP Verification Engineer

Senior IP Verification Engineer

Confidential • Hyderabad / Secunderabad, Telangana
30+ days ago
Job description

KEY RESPONSIBILITIES :

  • Work as a member of a geographically distributed verification team to verify next-generation ASIC and FPGAs
  • Develop testplans, implement testbenches, create testcases, and ensure functional coverage closure
  • Handle regression testing and contribute to verification infrastructure development
  • Develop both directed and random verification tests
  • Debug test failures, identify root causes, and work with RTL and firmware engineers to resolve design defects and test issues
  • Review functional and code coverage metrics, modify or add tests or constrain random tests to meet coverage requirement
  • Collaborate with design, software and architecture teams to verify design under test

PREFERRED EXPERIENCE :

  • Proficient in IP-level FPGA and ASIC verification
  • Knowledge of PCIe, CXL or other IO protocol is preferred
  • Proficient in Verilog / SystemVerilog, and scripting languages such as Perl or Python
  • Hands-on experience with SystemVerilog and UVM is mandatory
  • Experience in developing UVM-based verification testbenches, processes, and flows
  • Solid understanding of design flow, verification methodology, and general computational logic design and verification
  • THE ROLE :

    As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence .

    ACADEMIC CREDENTIALS :

  • Bachelor s or M aster s degree in computer engineering / Electrical Engineering with 4+Yrs of exp
  • Skills Required

    Python, Perl, Pcie, Asic verification, Testing

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    Verification Engineer • Hyderabad / Secunderabad, Telangana

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