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ASIC STA Engineer
ASIC STA EngineerBest NanoTech • India
ASIC STA Engineer

ASIC STA Engineer

Best NanoTech • India
5 days ago
Job description

About the Company

We are a leading technology company dedicated to innovation and excellence in the field of engineering. Our mission is to deliver cutting-edge solutions that empower our clients and enhance their operational efficiency. We foster a culture of collaboration, diversity, and continuous learning.

About the Role

The STA Engineer (Static Timing Analysis) will play a crucial role in ensuring the timing integrity of our designs. This position requires a deep understanding of timing analysis and the ability to collaborate effectively with various teams to achieve optimal results.

Responsibilities

  • Block level Timing Constraints generation, enablement & analysis across Functional & DFT modes
  • Clocking & Data flow understanding
  • Good in interaction with Design (FE) & DFT teams for better understanding
  • Well versed in reviewing check timing and Constraints QoR checks + Constraints Validation understanding
  • Able to interact with Implementation team counterparts for block timing closure
  • CTS building understanding along with Clock Tree spec review / closure
  • Timing ECOs & Final Timing last mile closure at block level
  • Scripting like TCL, Unix etc.

Qualifications

Experience : 3–8 Years

Location : Noida

Required Skills

  • Expertise in Synopsys PrimeTime, PT-ECO
  • Strong understanding of timing analysis and constraints
  • Proficient in scripting languages such as TCL and Unix
  • Preferred Skills

  • Experience with DFT methodologies
  • Familiarity with clock tree synthesis
  • Pay range and compensation package

    Competitive salary based on experience and qualifications.

    Equal Opportunity Statement

    We are an equal opportunity employer and are committed to fostering a diverse and inclusive workplace. We encourage applications from individuals of all backgrounds and experiences.

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