HI All,
I am looking for Senior Analog Circuit Design engineers for BLR & HYD Location.
Exp - 8+ yrs
NP - Immediate to 15 days.
JD :
We are looking for a highly experienced Analog Design Engineer specializing in SerDes architecture for high-speed I / O interfaces such as USB, DisplayPort, and PCIe . The ideal candidate will have a strong background in designing and validating CDR circuits , CTLEs , Deserializer architectures , and PLLs , and will play a key role in developing next-generation PHY IPs for advanced semiconductor nodes.
M.S. or Ph.D. in Electrical Engineering or related field.
8+ years of experience in analog / mixed-signal IC design, specifically in SerDes PHY development.
Deep understanding of high-speed interface standards : USB 3.X / 4, DisplayPort, PCIe Gen3 / Gen4 / Gen5 .
Proven expertise in designing and validating CDR, CTLE, PLL , and Deserializer blocks.
Proficiency in EDA tools such as Cadence Virtuoso, Spectre, HSPICE , and layout verification tools .
Strong grasp of signal integrity, jitter analysis, and equalization techniques.
interested candidates, kindly share with me your updated profile to anand.arumugam@modernchipsolutions.com / Ping me 9900927620
Immediate Hiring For • Hosur, Tamil Nadu, India