Principal 5G Digital Predistorter (DPD) RTL Design Engineer

We are seeking a 5G Digital Predistortion (DPD) Architect, responsible for developing 5G OpenRAN Radio Units with emphasis on transmitter linearizer system architecture and IP Core targeted towards Satellite Communication, Wireless Backhaul & mMIMO.

Responsibilities :

• Architecting, designing and optimizing DPD Subsystem within the mMIMO Radio
• Design high performance DPD and CFR IP Cores in RTL
• IP design responsibility of the DPD and CFR (Crest Factor Reduction) functional blocks in FPGA / ASIC fabric
• Ensuring the selected and implemented DPD system performance meets 3GPP and FCC requirements with volume production margins
• Ensuring the DPD is versatile to operate with the leading power transistor technologies, including LDMOS and GaN
• Owner of the DPD and CFR requirement specification of the mMIMO radio.
• Create detailed system level functional requirements and specifications related to CFR, DPD
• Monitor standards body activities to and participate (if necessary) to influence the industry with innovative vision of the company
• Identify opportunities for innovation and market disruption

Job Requirements :

Qualification :