Analog Layout Engineers
Experience : 5 years
Location : Bangalore
Solid experience in developing high speed IO / Analog layout design.
Expertise in working on FinFet layouts in lower nodes, preference to TSMCN 4nm and below.
Expertise in using the best and latest features of Cadence VXL and Calibre checks.
Thorough knowhow on layout effects, floorplan complexities due to High Voltage, routing and physical verification checks. The ability to work & communicate effectively with global engineering teams
Interested,please drop your updated resume to janagaradha.n@acldigital.com
Engineer • Bengaluru, Karnataka, India