We’re Hiring : RTL FPGA Engineer (HAPS Prototyping)
Location : Bangalore | Experience : 5–10 years
If you have hands-on experience with
Synopsys HAPS boards ,
ProtoCompiler , and
Identify Debug , we want to hear from you!
✅ Strong RTL design / verification (Verilog / SystemVerilog)
✅ FPGA implementation : synthesis, floorplanning, timing closure
✅ Board-level bring-up & debug (JTAG, oscilloscopes, logic analyzers)
✅ Interface bring-up : PCIe, DDR, Ethernet, UART / SPI / I2C
✅ Scripting : TCL, Python, Shell
Ready to take your FPGA expertise to the next level?
DM me or apply today!
Engineer • Delhi, India