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AMS Verification Engineer - System Verilog

AMS Verification Engineer - System Verilog

SEMI LEAFBangalore
30+ days ago
Job description

Job Responsibilities :

  • Lead the verification of analog and mixed-signal IPs such as bandgaps, LDOs, multi-phase buck regulators, comparators, and functional safety (FuSa) monitoring circuits.
  • Own and execute comprehensive verification plans for assigned blocks or features, ensuring complete coverage and robust test quality.
  • Develop or enhance analog behavioral models using System Verilog Real Number Modeling (SV-RNM).
  • Validate digital functionalities including CRC checks, clock monitors, register maps, OTPs, and communication interfaces.
  • Apply strong System Verilog skills, including the use of assertions and cover groups.
  • Utilize advanced debugging techniques across RTL and schematic views at the top level.
  • Manage and maintain VSIF files to support verification regression workflows.
  • Conduct coverage analysis using tools such as IMC or vManager.
  • Write or maintain automation scripts (Makefiles preferred) to streamline verification processes.
  • Work independently with minimal supervision, managing tasks and priorities effectively.

ref : hirist.tech)

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Verification Engineer • Bangalore

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