Post Silicon Validation Engineer - RTL / FPGA

Description :

Job Title : Post Silicon Validation Engineer (RTL FPGA)

Location : Hyderabad / Bangalore (On-site)

Experience : 5 - 10 Years

Notice Period : Immediate Joiners Preferred

About the Role :

We are seeking an experienced Post Silicon Validation (PSV) Engineer with strong expertise in RTL FPGA design, integration, and validation. The ideal candidate should have hands-on experience in FPGA design flow, system-level testing, and silicon validation with proficiency in debugging complex hardware and board-level issues.

Key Responsibilities :

• Execute FPGA design flow from RTL design to validation.
• Perform RTL design, integration, and implementation for FPGA-based systems.
• Work extensively on protocols such as PCIe, Ethernet, DDR4 / DDR5, and Memory interfaces.
• Lead system-level testing, silicon validation, and FPGA bring-up activities.
• Handle integration-focused tasks (approximately 80% Integration, 20% Design).
• Conduct design-level and board-level debugging to identify and resolve issues.
• Collaborate with cross-functional hardware, validation, and design teams to ensure seamless integration and performance validation.

Required Skills & Expertise :

Preferred Qualifications :

(ref : hirist.tech)