In your new role you will :

• The role will own verification of one or more IP blocks at IP-level andleading to chip-level for USB and automotive applications .
• The role will be responsible for Testbench Architecture, Test planning,Test Development and Verification for IP Blocks and Subsystems.
• The role will work on verification closure , including test plan,coverage and assertion closure
• The role will Interact with other functional leads from Design, DFT andFW / SW Teams
• The role will evaluate new tools & methodologies required for continuousimprovement of design flows
• Guide & Mentor junior engineers working on IP Blocks

You are best equipped for this task if you have :

Driving decarbonization and digitalization. Together.

Infineon designs, develops, manufactures, and markets a broad range of semiconductors and semiconductor-based solutions, focusing on key markets in the automotive, industrial, and consumer sectors. Its products range from standard components to special components for digital, analog, and mixed-signal applications to customer-specific solutions together with the appropriate software.

We are on a journey to create the best Infineon for everyone.

This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills.

Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.

for more information about Diversity & Inclusion at Infineon.