Staff / Sr Staff STA Engineer

Job Description

As a STA Product Engineer, you will be working with RnD and Field Application Engineering teams for enhancing tool algorithms for static timing requirements in new process nodes and usability features. Each node introduces new, complex layout design rules and other process nuances that impact the entire physical design implementation flows and timing signoff. Role will involve co-developing support with R&D, testing and rapid deployment of advanced node technologies for different customers. Also examining, debugging and solving in-depth technical issues related to implementation methodologies and flows. Ability to manage relatively open-ended problems and forge a path to a solution will be key.

Key Qualifications :

• RTL to GDSII full flow experience or knowledge is preferable
• Technical Skills to support Synopsys Full flow Implementation tools (Design Compile, Fusion Compiler, Primetime )
• Knowledge of static timing analysis concepts
• Strong interest and understanding Digital Design methodologies and tools including RTL coding in Verilog / SV, simulation, Synthesis, SpyGlass, STA, and UPF.
• Must possess collaborative teamwork experience and the aptitude and motivation to work with other internal and customer groups
• Excellent verbal and written presentation / communication skills are mandatory
• Good scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.
• Preferred Experience :
• 5-8 years of relevant experience
• Tool knowledge expected :
• Back end P&R tools (Fusion Compiler, ICC2, Innovus)
• Front end Synthesis tools (Fusion Compiler, Design Compiler, Genus),
• Tool knowledge (preferred) : STA (Primetime, Tempus)
• Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.